Skip to main content
     
18/09/2024
Edificio de Ingeniería UMA, Arquitecto Francisco Peñalosa, 6, Campanillas, 29071 Málaga

18th RES Users' Conference

18th RES Users' Conference

Don't miss any update on the event following us in X and LinkedIn!

@RES_HPC   RES - Red Española de Supercomputación

Event overview and register

The Spanish Supercomputing Network (RES) organizes the Annual RES User Conference with the purpose of providing updates on RES developments and offering relevant information about access to its resources and the European HPC ecosystem. This event serves as a meeting point for users, support technicians, and the user committee.

  • Digital Twins: models, algorithms and computation
  • Large Language Models (LLM) and Artificial Intelligence
  • Chips: RISC-V based processors development
  • Algorithms for the exascale
     

The RES-HPC award for a career in research, development, and/or dissemination of supercomputing has been granted to Professor José Manuel González Vida from the University of Málaga. His contribution to tsunami simulation is particularly noteworthy. 

REGISTRATION IS NOW CLOSED

Sponsors

            

Venue

The venue of the event is the School of Industrial Engineering of the University of Málaga.

Agenda

Tuesday 17th September 2024 - Faculty of Computer Sciences
12:00Talk with students: 
Mateo Valero — Barcelona Supercomputing Center's director
Mario Nemirovsky —  INNOVA IRV's CEO
15:00Welcome
15:15Taller técnico: "Managing a Federated HPC Data Environment in the Advent of AI" por Sven Breuner (Field CTO International of VAST Data)

Storage in HPC lacks innovation and has gotten way too complicated and incovenient over the last years - for the system administrators that have to manage a whole zoo of different systems and for the researchers that should focus in their research instead of data management, access patterns an protocols. Time for a change before it gets even worse over the next years!
16:45COFFEE BREAK
17:00

Taller técnico: "Building a RAG Agent" por Frederic Pariente (NVIDIA)

Retrieval Augmented Generation (RAG) is an architecture used to optimize the output of a Large Language Model (LLM) with dynamic, domain specific data without the need of retraining the AI model. This workshop will jumpstart you on your LLM and RAG journey.

Wednesday 18th September 2024 - Faculty of Industrial Engineering
9:00Registration Open - 1st day
9:30Inaugural session
10:00Thematic Panel: Digital Twins
Moderator: José Manuel Claver — Universitat de València
Participants: 
Sergio Chiva — Universitat Jaume I
Miguel Castrillo — Barcelona Supercomputing Center
Mariano Vázquez — Barcelona Supercomputing Center
Roser Sánchez-Todo — Neuroelectrics
11:30COFFEE BREAK & POSTER EXHIBITION
12:00Thematic Panel: Algorithms for Exascale. Inno4scale
Moderator: Guy Lonsdale — Scapos AG
Participants: 
Siegfreid Benkner — University of Vienna
José Román Moltó — Universitat Politècnica de València
Niclas Jansson — KTH Royal Institute of Technology
Guilherme Vaz — BlueOASIS
13:30DINNING BREAK
15:00Thematic Panel: Chips - RISC-V based processor development
Moderator: Óscar Plata — Universidad de Málaga
Participants: 
Francesc Guim — OPENCHIP & SOFTWARE TECHNOLOGIES
Osman Unsal — Barcelona Supercomputing Center
Gabriel Caffarena — Open RAN Málaga Lab, Vodafone Innovation Campus
Mario Nemirovsky — INNOVA IRV
16:30END OF DAY 1
17:30Social Activity - Málaga Guided Tour
20:45OFICIAL DINNER JURES2024 - Restaurant "El Merendero"
Thursday 19th September 2024 - Faculty of Industrial Engineering
9:00RES objectives, impact and mission — Sergi Girona
9:30Thematic Panel: Large Language Models (LLM) and Artifical Intelligence
Moderator: Marta Villegas — Barcelona Supercomputing Center
Participants: 
Paloma Martínez — Universidad Carlos III de Madrid
Arturo Montejo — Universidad de Jaén
Itziar Aldabe — UPV/EHU
Carlos de Huerta — Microsoft
11:00COFFEE BREAK & POSTER EXHIBITION
11:30RES Users' Committee (CURES) — Review 2024
12:00RES Outstanding Paper Award 2023 — Talk by Grigori Astrakharchik
12:30RES Award and Closing Session
13:00END OF DAY 2
13:30DATA — Technical session for RES technicians
15:00HPC — Technical session for RES technicians

Apply to the RES Awards and Travel Grants

Applications for the awards and the travel grants are made via the application form. 

With the aim of recognising excellent scientific works performed using RES resources, the conference will deliver the following awards: 

  • RES Best Poster Award: Given to the author of the most meritorious poster presented at the RES Users' Conference. The works presented MUST have been carried out using RES supercomputing, AI or data resources. The winner will be decided during the the conference by popular vote and will be entitled to a travel grant for next year's RES Users' Conference. 

    The awarded poster in JURES24 is "Synthetic Image Detection with SuSy" by Pablo Bernabeu from Barcelona Supercomputing Center.

  • RES Best Paper Award: Given to the author of the most excellent paper presented in the registration process. The works presented MUST have been carried out using RES supercomputing, AI or data resources. The winner will be decided by the RES Council based on the proposals of the Access Committee coordinators which will evaluate the applications by the excellence of both the work and the author. Winning the award entitles the author to give an oral presentation about their paper in next year's conference.

    The awarded paper in JURES24 is "PNG-UNITsims: Halo clustering response to primordial non-Gaussianities as a function of mass" by Adrián Gutiérrez from IFT/UAM - Instituto de Física Teórica de la Universidad Autónoma de Madrid. 

  • Travel Grants: Aimed at covering transport and accommodation to young researchers (usually MSc and PhD students, or recent PhDs) presenting a poster to the conference. The organisation will cover travel expenses, up to 500€ maximum following BSC regulation.

    A total of 4 travel grants have been awarded to Pablo Bernabeu (BSC), Adrián Gutiérrez (IFT/UAM), Masoud Mansouri (UAM) and Laura Palacio (Ci2B).